1. Field of the Invention
The present invention relates to a receiver circuit, an application of a first proportional element and second proportional element of a digital PLL structure, and a method for receiving a frequency-shift-keyed signal.
2. Description of the Background Art
Frequency shift keying (FSK) is a digital form of frequency modulation. In this process, the frequency of a periodic, in particular sinusoidal, oscillation is varied among a set of different discrete values. Each frequency value here corresponds to a specific digital level. If the digital signal is a binary signal, hence {0, 1}, then two frequency values are used. In contrast, in a ternary signal, three values—e.g., {−1, 0, 1}—are used. The spectrum of the modulated signal contains, at least in part, the frequency response of the square-wave pulse, whose bandwidth is theoretically infinite. This is also referred to as “hard FSK.” However, since the spectrum is generally to be limited, the square-wave pulse is preferably “rounded off” prior to the modulation and is reshaped into a sinusoidal curve or a Gaussian curve. This results in a considerably smaller bandwidth, and is referred to as a “soft FSK.” The most important parameters for frequency shift keying are the frequency shift and the modulation index. The shift specifies how much separation is present between the discrete frequency values. The modulation index is the ratio of the shift and bit rate. A frequency shift keying with a modulation index equal to 0.5 is also designated as MSK (Minimum Shift Keying). In contrast, GMSK (Gaussian Minimum Shift Keying) is an MSK method with a preceding Gaussian filter.
A PLL (phase-locked loop) is a phase-coupled closed-loop control circuit. A PLL structure can be used to demodulate frequency-modulated or phase-modulated signals.
A demodulator with a digital PLL structure is known from IEICE Trans. Commun., Vol. 84-B, No. 1, pp. 26-35, January 2001, “Demodulation of CPFSK and GMSK Signals using Digital Signal Processing DPLL with Sequence Estimator.” The digital PLL used here has the inherent capability for frequency tracking and is suitable for demodulating signals with relatively large Doppler shifts, for example satellite signals. Demodulation of continuous phase frequency-shift keying (CPFSK) and demodulation of GMSK are discussed. An in-phase signal and a quadrature signal are analog-to-digital converted and serve as input signals to an arctangent circuit. Using a subtractor, an output signal of a controlled oscillator is extracted from the output signal of the arctangent circuit, wherein the controlled oscillator is made up of a proportional element and an integrator. The controlled oscillator is connected to the subtractor through a loop filter, a phase detector and a mod 2p circuit to form a digital PLL structure. The subtractor and the mod 2p circuit correspond to the phase comparator in a classical PLL (generally implemented as an XOR gate there). The input signals of the subtractor represent the phase position of the real input signal relative to the local oscillator (f0) and the phase position created by the integrator. In contrast, a real VCO signal does not exist here as a sinusoidal oscillation. The mod 2p circuit could be omitted in the real circuit, since the method of counting the angle in the circuit repeats after 360°, corresponding to 2p (rad). In this regard, the overflow in subtraction is ignored.